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| 74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input February 1992 Revised June 2001 74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input General Description The LVQ14 contains six inverter gates each with a Schmitt trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters. The LVQ14 has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. Features s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin skew AC performance s Guaranteed incident wave switching into 75 Ordering Code: Order Number 74LVQ14SC 74LVQ14SJ Package Number M14A M14D Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Pin Names In On Description Inputs Outputs Truth Table Input I L H H = HIGH Voltage Level L = LOW Voltage Level Output O H L (c) 2001 Fairchild Semiconductor Corporation DS011345 www.fairchildsemi.com 74LVQ14 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC ) DC Input Diode Current (IIK) VI = -0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current -0.5V to +7.0V -20 mA +20 mA -0.5V to VCC + 0.5V -20 mA +20 mA -0.5V to VCC + 0.5V 50 mA 200 mA -65C to +150C 100 mA Recommended Operating Conditions (Note 2) Supply Voltage (VCC) LVQ Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) VIN from 0.8V to 2.0V VCC @ 3.0V 125 mV/ns Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float. 2.0V to 3.6V 0V to VCC 0V to VCC -40C to +85C DC Electrical Characteristics Symbol VOH Parameter Minimum High Level Output Voltage VOL Maximum Low Level Output Voltage IIN Vt+ Vt- Vh(max) Vh(min) IOLD IOHD ICC VOLP VOLV VIHD VILD Maximum Input Leakage Current Maximum Positive Threshold Minimum Negative Threshold Maximum Hysteresis Minimum Hysteresis Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Maximum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage VCC (V) 3.0 3.0 3.0 3.0 3.6 3.0 3.0 3.0 3.0 3.6 3.6 3.6 3.3 3.3 3.3 3.3 0.9 -0.8 1.9 1.3 2.0 1.1 -1.1 2.0 2.0 0.002 TA = +25C Typ 2.99 2.9 2.58 0.1 0.36 0.1 2.2 0.5 1.2 0.3 TA = -40C to +85C Guaranteed Limits 2.9 2.48 0.1 0.44 1.0 2.2 0.5 1.2 0.3 36 -25 20.0 V V V V A V V V V mA mA A V V V V IOUT = -50 A VIN = VIL or VIH (Note 3) IOH = -12 mA IOUT = 50 A VIN = VIL or VIH (Note 3) IOL = 12 mA VI = VCC, GND TA = Worst Case TA = Worst Case TA = Worst Case TA = Worst Case VOLD = 0.8V Max (Note 5) VOHD = 2.0V Min (Note 5) VIN = VCC or GND (Note 6)(Note 7) (Note 6)(Note 7) (Note 6)(Note 8) (Note 6)(Note 8) Units Conditions Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n - 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. www.fairchildsemi.com 2 74LVQ14 AC Electrical Characteristics TA = +25C Symbol Parameter VCC (V) tPLH tPHL tOSHL, tOSLH Propagation Delay Propagation Delay Output to Output Skew Data to Output (Note 9) 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 Min 1.5 1.5 1.5 1.5 CL = 50 pF Typ 11.4 9.5 9.0 7.5 1.0 1.0 Max 19.0 13.5 16.2 11.5 1.5 1.5 TA = -40C to +85C CL = 50 pF Min 1.5 1.5 1.5 1.5 Max 21.0 15.0 19.0 13.0 1.5 1.5 ns ns ns Units Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol CIN CPD (Note 10) Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 20 Units pF pF VCC = Open VCC = 3.3V Conditions Note 10: CPD is measured at 10 MHz. 3 www.fairchildsemi.com 74LVQ14 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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